Patterning of insulators in modern semiconductor technology, especially for so-called “middle of the line” or MOL levels, may require the use of barrier or “stop” layers because of the presence of underlying topography. The barrier layer is substantially different than the isolation dielectric material above it, and therefore, by design, requires a separate etching step in the patterning process which has selectivity to the underlying materials.
One such MOL level requires that the barrier, typically silicon nitride, be etched over a silicide. It may be desirable for device performance reasons for the silicide layer to be made of a nickel silicide (NiSi), as opposed to a cobalt silicide (CoSi). These materials have different physical and chemical properties and the etching chemistry for the barrier layer must be chosen properly to avoid consuming excessive amounts of the silicide during the process. Also, the amount of residuals left behind and the surface damage must be minimized, so that the surface of the underlying silicide is suitable for further processing.
Conventional barrier etch processes have been shown to consume too much of the NiSi and deposit excessive amounts of polymer, especially on devices such as arsenic doped n-FETs. In order to prevent excessive deposition of polymer and consequent etch stop, an oxygen feedgas is added to the barrier etch chemistry. Although the use of oxygen is adequate for cobalt based silicides, a thick residual film are often formed in the contacts when the oxygen feedgas is used with nickel silicides. These residuals are resistant to standard dry clean steps used in plasma etching (e.g., oxygen), and are less prevalent in tooling with an inherently lower self-bias voltage. These residuals may be formed by carbonyls of nickel and subsequent delamination into the contact. The exact mechanism is not clearly understood, nor is the reason why n-FETs, especially arsenic doped n-FETs, are most likely affected.
MOL contact etch typically requires a high self-bias process for the oxide step for both profile control and throughput. One possible solution to the formation of residuals has been to run the barrier etch in a different tool. This solution is designed to etch the barrier layer but is often not well suited to etching the thick isolation dielectric. For example, for silicon nitride, a spacer type etch tool may be used, which has a very low inherent self-bias, and therefore allows higher inherent selectivity to silicides than that possible on a standard oxide etch tool. If no Ni is eroded, then the postulated Ni carbonyl formation cannot occur. However, this de-integrated approach increases the cycle time of the MOL etch, produces an increased risk of defects, and requires additional tooling.